Index for interrupt INT 01

Table of Contents by Order
01 - INT 01 C - CPU-generated - SINGLE STEP
01 - INT 01 C - CPU-generated (80386+) - DEBUGGING EXCEPTIONS

INT 01 C - CPU-generated - SINGLE STEP
Desc:	generated after each instruction if TF (trap flag) is set; TF is
	  cleared on invoking the single-step interrupt handler
Notes:	interrupts are prioritized such that external interrupts are invoked
	  after the INT 01 pushes CS:IP/FLAGS and clears TF, but before the
	  first instruction of the handler executes
	used by debuggers for single-instruction execution tracing, such as
	  MS-DOS DEBUG's T command
SeeAlso: INT 03"CPU"

INT 01 C - CPU-generated (80386+) - DEBUGGING EXCEPTIONS
Desc:	generated by the CPU on various occurrences which may be of interest
	  to a debugger program
Note:	events which may trigger the interrupt:
	  Instruction address breakpoint fault - will return to execute inst
	  Data address breakpoint trap - will return to following instruction
	  General detect fault, debug registers in use
	  Task-switch breakpoint trap
	  undocumented 386/486 opcode F1h - will return to following instruc
SeeAlso: INT 03"CPU"